Author Topic: Compiling the FPGA code  (Read 4993 times)

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Offline foldor

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Compiling the FPGA code
« on: March 04, 2016, 05:17 AM »
Hi, I'm working on compiling my own copy of SD2SNES from the official Github using the latest development version, and it's mostly been going well but the README (https://github.com/mrehkopf/sd2snes/tree/develop/src) is pretty outdated, and kind of short on being complete. I've managed to compile most of the different files though, including the menu.bin and the firmware.img. However, I'm stuck at the point where I'm supposed to use Xilinx ISE Webpack to compile the Verilog code.

I downloaded and installed Xilinx 14.7, and I've opened up the sd2snes/verilog/sd2snes/sd2snes.xise project, and when I try to run "Implement Design" I get 6 errors and 206 Warnings. 205 of the warnings are the the Synthesis report, and the 6 errors and one of the warnings are in the translation report.

The errors all follow the same format like this:
NgdBuild:604 - logical block 'snescmd' with type 'snescmd_buf' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, case mismatch between the block name and the edif or ngc file name, or the misspelling of a type name. Symbol 'snescmd_buf' is not supported in target 'spartan3'.

Does anyone have any experience in compiling the FPGA code and could help point me in the right direction please?

Offline iwasaperson

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Re: Compiling the FPGA code
« Reply #1 on: March 05, 2016, 01:32 AM »
I have had the same issue, and have found no solution so far. I don't know verilog.
@Syboxez on Discord and some other places as well.

Offline borti4938

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Re: Compiling the FPGA code
« Reply #2 on: March 06, 2016, 12:11 AM »
you have to regenerate all cores present in the hierarchy (expand hierarchy to see all of them).
Afterwards you can running synthesizing and implementing the design and generate the programming file.

You will get a main.bit file, which has to be compressed using the rle tool

compile rle:
gcc -o rle rle.c

compress a main.bit (example for the verilog/sd2snes/main.bit, which is the base file):
 ./rle main.bit fpga_base.bit

This file can be copied to your SD card ;)
« Last Edit: May 30, 2016, 09:58 AM by borti4938 »

Offline iwasaperson

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Re: Compiling the FPGA code
« Reply #3 on: March 06, 2016, 02:49 AM »
you have to regenerate all cores present in the hierarchy (see attached file as an example).
Afterwards you can running synthesizing and implementing the design and generate the programming file.



You will get a main.bit file, which has to be compressed using the rle tool

compile rle:
gcc -o rle rle.c

compress a main.bit (example for the verilog/sd2snes/main.bit, which is the base file):
 ./rle main.bit fpga_base.bit

This file can be copied to your SD card ;)

That worked. Thanks.
MSU-1 stopped working completely when I did that. I'm just going to revert to the latest preview.
« Last Edit: March 06, 2016, 03:15 AM by iwasaperson »
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Offline borti4938

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Re: Compiling the FPGA code
« Reply #4 on: March 06, 2016, 02:28 PM »
MSU-1 stopped working completely when I did that.

you also have to compile the firmware in the src-folder and the menu in the snes-folder to get the firmware.img and menu.bin.

I'm just going to revert to the latest preview.

my last build: Download

Offline iwasaperson

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Re: Compiling the FPGA code
« Reply #5 on: March 06, 2016, 11:17 PM »
MSU-1 stopped working completely when I did that.

you also have to compile the firmware in the src-folder and the menu in the snes-folder to get the firmware.img and menu.bin.

I'm just going to revert to the latest preview.
I did, but that still didn't work. Your build works fine though.
@Syboxez on Discord and some other places as well.

Offline foldor

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Re: Compiling the FPGA code
« Reply #6 on: March 07, 2016, 12:25 AM »
Thanks for the help! I've got it working now. For anyone else having this problem, there's also a problem trying to regenerate the cores on a network mapped drive in Windows for some reason. I just moved the files to my local workspace and it started working perfectly.

Offline borti4938

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Re: Compiling the FPGA code
« Reply #7 on: March 07, 2016, 03:31 PM »
I also work on a network drive (Windows is guest in a vbox and the project files are located in a shared folder; Xilinx don't like MacOS :P ). I have no problems. As far as I know there is only a problem if the location contains spaces or other special characters.

Offline Mrwoodchuck

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Re: Compiling the FPGA code
« Reply #8 on: May 23, 2016, 01:09 AM »
I'm amazed that some one was able to get that far.

I Bought all my parts and build the board out, had some snags but everything looks good.

I cant even get the bootloader built, I use windows and noticed the tutorial was for linux so i fired up a vm "linux mint"
installed gcc-arm-none-eabi, it gives me errors when trying to do make && make missing stdint.h, but it is in the dir it was looking in....

I thought maybe because i did not install the toolchain-cm3 that was the issue, tried make on that nope that got an error 77..

so at the moment I'm stuck with a board that should work if i could install the code that i have no idea on how to compile.

anyone have a download? lol

Offline borti4938

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Re: Compiling the FPGA code
« Reply #9 on: May 30, 2016, 10:01 AM »

Offline Mrwoodchuck

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Re: Compiling the FPGA code
« Reply #10 on: June 04, 2016, 09:01 AM »
Thanks for the info borti,

I totally missed that readme file.

I was able to get it built by making an older copy of linux onto a new vm, building the files on the vm, moving them to a raspberry pi,
banging my head until i got the rpi to act as a jtag cable, uploaded the code, realized i put some parts on backwards... 

now I need to buy new 4M ram, and trace down why the diagnostic firmware is telling me the snes is dead. I assume pins need more solder.

Anyways thanks for the heads up,
Don