Redguy, I noticed your v06 and v07 tags point to the same commit. Just in case you didn't notice it yourself yet.
Thank you for your hard work!
As for the memory timing issue, I really feel bad that I didn't connect the dots between some calculations I made earlier and the problems people were having. 24 MHz times 25/7 means a 70 ns PSRAM access is exactly 6 cycles, so should theoretically have been fine, but this must have been a bit too tight for some PSRAM chips. I was wondering about this at one point earlier, but then forgot about it as it seemed to work fine for me.